Junior Digital Design Engineer (2512300201)

Title: 
  • Junior Digital Design Engineer
Duties: 
  • Perform system modeling and optimization, develop signal processing algorithms and architecture in communication application specific integrated circuit (ASIC).
Requirement: 
  • M.S. in Electronics Engineering, Electrical Engineering
Job Type: 
  • Full-time
Schedule: 
  • Monday through Friday, 8:00 a.m. to 5:00 p.m.
Location: 
  • Santa Clara, CA
Contact: 
  • Aeonsemi Technologies, Inc.
  • 2550 Great America Way, Suite 325
  • Santa Clara, CA 95054
  • E-mail: Jobs@aeonsemi.com