Job Responsibilities

• Establish internal layout flow block level layout, chip integration to final tape out
• Hands on layout of high speed high performance analog circuits
• Manage in house layout engineers and external layout contractors

Job Requirements

• BS degree in EE
• 5 + years of layout design experience, 2+ years of FinFet experience
• Understand ESD/Latchup, Power/GND, EM check, RF/analog design practices
• Familiar with Cadence EDA tools
• Prior experience in leading successful chip to production is desirable
• Programming / scripting skills are desirable